Method for making a circuit plate

ABSTRACT

A method for making a circuit plate includes: forming first holes in an insulating layer; forming a conductive layer on the insulating layer such that a portion of the conductive layer fills the first holes; grinding the conductive layer such that the portion of the conductive layer remains in the first holes to form a pattern of conductive traces; forming a dielectric protective layer that covers the insulating layer and the conductive traces; forming a pattern of second holes in the protective layer such that a portion of each of the conductive traces is accessible through a respective one of the second holes; and forming conductive bumps that are respectively connected to the conductive traces.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority of Taiwanese application No. 093119684,filed on Jun. 30, 2004.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a method for making a circuit plate, moreparticularly to a method for making a circuit plate using semiconductorprocessing techniques.

2. Description of the Related Art

Conventional circuit plates normally include a dielectric substrate thatis formed with a pattern of conductive traces thereon for electricalconnections among electronic components to be mounted on the substrate.Conventional methods for forming the conductive traces on the substrateinvolve attaching a copper film to the substrate, followed by formingthe copper film into the pattern of the conductive traces throughphotolithographic techniques. Since the copper film is relatively thick,there is a minimum line width restriction for each of the conductivetraces. As a consequence, when contacts of an electronic component,which are spaced apart by a very short distance, are to be mounted onthe circuit plate, short circuits are likely to occur. Therefore,electronic components with very short spacing between contacts areunsuited for use with the conventional circuit plates.

SUMMARY OF THE INVENTION

The object of the present invention is to provide a method for making acircuit plate that is capable of overcoming the aforesaid drawback ofthe prior art.

According to one aspect of the present invention, there is provided amethod for making a circuit plate containing conductive traces forelectrical connections among electronic components to be mounted on thecircuit plate. The method comprises: preparing a substrate having adielectric portion that has a planar circuit-forming surface; forming aninsulating layer on the circuit-forming surface; forming a pattern offirst holes in the insulating layer using photolithographic techniques;forming a conductive layer on the insulating layer such that a portionof the conductive layer completely fills the first holes in theinsulating layer; grinding the conductive layer such that the portion ofthe conductive layer, which fills the first holes, remains in the firstholes, and that the remainder of the conductive layer is removedtherefrom, thereby forming a pattern of conductive traces on thesubstrate; forming a dielectric protective layer that covers theinsulating layer and the conductive traces; forming a pattern of secondholes in the protective layer using photolithographic techniques suchthat a portion of each of the conductive traces is accessible through arespective one of the second holes; and forming a pattern of conductivebumps such that each of the conductive bumps extends into a respectiveone of the second holes to connect electrically with a respective one ofthe conductive traces and that each of the conductive bumps protrudesoutwardly from the respective one of the second holes.

According to another aspect of the present invention, there is provideda method for making a circuit plate containing conductive traces forelectrical connections among electronic components to be mounted on thecircuit plate. The method comprises: preparing a substrate having adielectric portion that has a planar circuit-forming surface; forming aninsulating layer on the circuit-forming surface; forming a pattern offirst holes in the insulating layer using photolithographic techniques;forming a conductive layer on the insulating layer such that a portionof the conductive layer is formed on hole-defining walls of the firstholes in the insulating layer; grinding the conductive layer such thatthe portion of the conductive layer, which is formed on thehole-defining walls of the first holes, remains in the first holes, andthat the remainder of the conductive layer is removed therefrom, therebyforming a pattern of conductive traces on the substrate; forming adielectric protective layer that covers the insulating layer and theconductive traces; forming a pattern of second holes in the protectivelayer using photolithographic techniques such that a portion of each ofthe conductive traces is accessible through a respective one of thesecond holes; and forming a pattern of conductive bumps such that eachof the conductive bumps extends into a respective one of the secondholes to connect electrically with a respective one of the conductivetraces and that each of the conductive bumps protrudes outwardly fromthe respective one of the second holes.

According to yet another aspect of the present invention, there isprovided a method for making a circuit plate containing conductivetraces for electrical connections among electronic components to bemounted on the circuit plate. The method comprises: preparing asubstrate having a dielectric portion that has a planar circuit-formingsurface; forming a conductive layer on the circuit-forming surface;forming the conductive layer into a pattern of conductive traces on thecircuit-forming surface using photolithographic techniques; forming aninsulating layer on the circuit-forming surface such that a portion ofthe insulating layer covers the conductive traces; grinding theinsulating layer such that the portion of the insulating layer isremoved, thereby exposing the conductive traces therefrom; forming adielectric protective layer that covers the insulating layer and theconductive traces; forming a pattern of second holes in the protectivelayer using photolithographic techniques such that a portion of each ofthe conductive traces is accessible through a respective one of thesecond holes; and forming a pattern of conductive bumps such that eachof the conductive bumps extends into a respective one of the secondholes to connect electrically with a respective one of the conductivetraces and that each of the conductive bumps protrudes outwardly fromthe respective one of the second holes.

BRIEF DESCRIPTION OF THE DRAWINGS

In drawings which illustrate embodiments of the invention,

FIGS. 1 to 5 are fragmentary schematic sectional views to illustrateconsecutive steps of the first preferred embodiment of a method formaking a circuit plate according to the present invention;

FIGS. 6 to 9 are fragmentary schematic sectional views to illustrateconsecutive steps of the second preferred embodiment of a method formaking a circuit plate according to the present invention; and

FIG. 10 to 15 are fragmentary schematic sectional views to illustrateconsecutive steps of the third preferred embodiment of a method formaking a circuit plate according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

For the sake of brevity, like elements are denoted by the same referencenumerals throughout the disclosure.

FIGS. 1 to 5 illustrate consecutive steps of the first preferredembodiment of a method for making a circuit plate according to thepresent invention. The circuit plate contains conductive traces 30 (onlyone conductive trace 30 is shown in FIG. 4) for electrical connectionsamong electronic components (not shown) adapted to be mounted on thecircuit plate.

The method of this embodiment includes the steps of: preparing asubstrate 1 having a dielectric portion 11 that has a planarcircuit-forming surface 110 (see FIG. 1); forming an insulating layer 2on the circuit-forming surface 110 (see FIG. 1); forming a pattern offirst holes 20 (only one is shown) in the insulating layer 2 usingphotolithographic techniques (see FIG. 2); forming a conductive layer 3on the insulating layer 2 such that a portion 31 of the conductive layer3 completely fills the first holes 20 in the insulating layer 2 (seeFIG. 3); grinding the conductive layer 3 such that the portion 31 of theconductive layer 3, which fills the first holes 20, remains in the firstholes 20, and that the remainder of the conductive layer 3 is removedtherefrom, thereby forming a pattern of the conductive traces 30 on thesubstrate 1 (see FIG. 4); forming a dielectric protective layer 5, thatcovers the insulating layer 2 and the conductive traces 30; forming apattern of second holes 50 in the protective layer 5 usingphotolithographic techniques such that a portion of each of theconductive traces 30 is accessible through a respective one of thesecond holes 50 (see FIG. 5); and forming a pattern of conductive bumps6 such that each of the conductive bumps 6 extends into a respective oneof the second holes 50 to connect electrically with a respective one ofthe conductive traces 30 and that each of the conductive bumps 6protrudes outwardly from the respective one of the second holes 50 (seeFIG. 5).

In this embodiment, the conductive layer 3 is formed by applying aconductive paste to the insulating layer 2, followed by allowing theconductive paste to harden.

Preferably, a pattern of metal traces 4 is formed on the pattern of theconductive traces 30 prior to formation of the protective layer 5 suchthat each of the metal traces 4 covers a respective one of theconductive traces 30 (see FIG. 5). Each of the conductive bumps 6 isformed on a respective one of the metal traces 4. Each of the metaltraces 4 includes at least one metal film that is made from a metalselected from the group consisting of Ni, Au, Cu, and Al. Preferably,each of the metal traces 4 has a two-ply structure with two differentmetal films, such as a Cu—Ni two-ply structure, or a Ni—Al two-plystructure.

The protective layer 5 is preferably made from a photo sensitivematerial.

Each of the conductive traces 30 thus formed is capable of achieving aline width smaller than the minimum line width of the conductive tracesof the aforesaid conventional circuit plate.

In addition, the size of each of the conductive bumps 6 can becontrolled by controlling the size of the second holes 50 in theprotective layer 5 so that the size of each of the conductive bumps 6corresponding to the spacing between the contacts of an electroniccomponent to be mounted on the circuit plate can be achieved.

It is noted that although the conductive traces 30 are formed at thesame level of the substrate 1 in this embodiment, the conductive traces30 can also be formed at different levels of the substrate 1.

The entire substrate 2 can be made from an insulating material or aconductive material with a dielectric layer formed thereon.

Moreover, the substrate 1 can be formed with conductive contacts (notshown) on the circuit-forming surface 110 according to the need forconnecting with the conductive traces 30.

FIGS. 6 to 9 illustrate consecutive steps of the second preferredembodiment of a method for making a circuit plate according to thepresent invention.

The method of this embodiment includes the steps of: preparing asubstrate 1 having a dielectric portion 11 that has a planarcircuit-forming surface 110 (see FIG. 6); forming an insulating layer 2on the circuit-forming surface 110 (see FIG. 6); forming a pattern offirst holes 20 (only one is shown) in the insulating layer 2 usingphotolithographic techniques (see FIG. 6); forming a conductive layer 3on the insulating layer 2 such that a portion 30′ of the conductivelayer 3 is formed on hole-defining walls 20′ of the first holes 20 inthe insulating layer 2 (see FIG. 7); grinding the conductive layer 3such that the portion 30′ of the conductive layer 3, which is formed onthe hole-defining walls 20′ of the first holes 20, remains in the firstholes 20, and that the remainder of the conductive layer 3 is removedtherefrom, thereby forming a pattern of the conductive traces 30 on thesubstrate 1 (see FIG. 8); forming a dielectric protective layer 5 thatcovers the insulating layer 2 and the conductive traces 30 (see FIG. 9);forming a pattern of second holes 50 in the protective layer 5 usingphotolithographic techniques such that a portion of each of theconductive traces 30 is accessible through a respective one of thesecond holes 50 (see FIG. 9); and forming a pattern of conductive bumps6 such that each of the conductive bumps 6 extends into a respective oneof the second holes 50 to connect electrically with a respective one ofthe conductive traces 30 and that each of the conductive bumps 6protrudes outwardly from the respective one of the second holes 50 (seeFIG. 9).

In this embodiment, the conductive layer 3 is formed using sputteringtechniques. Each of the conductive traces 30 includes at least one metalfilm that is made from a metal selected from the group consisting of Ni,Au, Cu, and Al.

Preferably, a pattern of metal traces 4 is formed on the pattern of theconductive traces 30 prior to formation of the protective layer 5 suchthat each of the metal traces 4 covers a respective one of theconductive traces 30 and fills a respective one of the first holes 20(see FIG. 9). Each of the conductive bumps 6 is formed on a respectiveone of the metal traces 4. Each of the metal traces 4 includes at leastone metal film that is made from a metal selected from the groupconsisting of Ni, Au, Cu, and Al.

FIGS. 10 to 15 illustrate consecutive steps of the third preferredembodiment of a method for making a circuit plate according to thepresent invention.

The method of this embodiment includes the steps of: preparing asubstrate 1 having a dielectric portion 11 that has a planarcircuit-forming surface 110 (see FIG. 10); forming a conductive layer 3on the circuit-forming surface 110 (see FIG. 10); forming the conductivelayer 3 into a pattern of conductive traces 30 on the circuit-formingsurface 110 using photolithographic techniques (see FIG. 11); forming aninsulating layer 2 on the circuit-forming surface 110 such that aportion 21 of the insulating layer 2 covers the conductive traces 30(see FIG. 12); grinding the insulating layer 2 such that the portion 21of the insulating layer 2 is removed, thereby exposing the conductivetraces 30 therefrom (see FIG. 13); forming a dielectric protective layer5 that covers the insulating layer 2 and the conductive traces 30 (seeFIG. 15); forming a pattern of second holes 50 in the protective layer 5using photolithographic techniques such that a portion of each of theconductive traces 30 is accessible through a respective one of thesecond holes 50 (see FIG. 15); and forming a pattern of conductive bumps6 such that each of the conductive bumps 6 extends into a respective oneof the second holes 50 to connect electrically with a respective one ofthe conductive traces 30 and that each of the conductive bumps 6protrudes outwardly from the respective one of the second holes 50 (seeFIG. 15).

In this embodiment, the conductive layer 3 is formed using sputteringtechniques. Each of the conductive traces 30 includes at least one metalfilm that is made from a metal selected from the group consisting of Ni,Au, Cu, and Al.

Preferably, a pattern of metal traces 4 is formed on the pattern of theconductive traces 30 prior to formation of the protective layer 5 suchthat each of the metal traces 4 covers a respective one of theconductive traces 30 (see FIG. 14). Each of the conductive bumps 6 isformed on a respective one of the metal traces 4. Each of the metaltraces 4 includes at least one metal film that is made from a metalselected from the group consisting of Ni, Au, Cu, and Al.

By forming the conductive traces 30 and the conductive bumps 6 in thecircuit plate of this invention, the aforesaid drawback associated withthe prior art can be alleviated.

With the invention thus explained, it is apparent that variousmodifications and variations can be made without departing from thespirit of the present invention. It is therefore intended that theinvention be limited only as recited in the appended claims.

1. A circuit plate comprising; a substrate having a dielectric portionthat has a planar circuit-forming surface; an insulating layer formed onthe circuit-forming surface and formed with a pattern of first holes; apattern of conductive traces formed on said circuit-forming surfacewithin said first holes, respectively; a protective layer formed on saidinsulating layer and formed with a plurality of second holes such thateach of said conductive traces is accessible through a respective one ofsaid second holes; and a pattern of conductive bumps, each of whichextends into a respective one of said second holes to connectelectrically with a respective one of said conductive traces and each ofwhich protrudes outwardly from the respective one of said second holes.2. The circuit plate of claim 1, wherein said conductive traces are madefrom a conductive paste.
 3. The circuit plate of claim 2, furthercomprising a pattern of metal traces, each of which is formed on andcovers a respective one of said conductive traces, each of saidconductive bumps being formed on a respective one of said metal traces.4. The circuit plate of claim 1, wherein each of said conductive tracesincludes at least one metal film that is made from a first metalselected from the group consisting of Ni, Au, Cu, and Al.
 5. The circuitplate of claim 4, further comprising a pattern of metal traces, each ofwhich is formed on and covers a respective one of said conductivetraces, each of said conductive bumps being formed on a respective oneof said metal traces.
 6. The circuit plate of claim 5, wherein each ofsaid metal traces includes at least one metal film that is made from asecond metal selected from the group consisting of Ni, Au, Cu, and Al.